Tarang Saxena - Email & Phone Number

Program Manager at R&D Altanova

Tarang Saxena is based out of San Jose, California, United States and works at R&D Altanova as Program Manager.

Tarang Saxena's Contact Information

Tarang Saxena's Work email

t*****@rdalta***.com

Valid

Latest update

October 30, 2025

Location

San Jose, California, United States

Tarang's current employer

R&D Altanova

Description

The leading provider of turn-key PCB test interface solutions specializing in the engineering, design, and fabrication of load boards, pr...

Website

rdaltanova.com

HQ Location

South Plainfield, New Jersey, United States

Number of employees

501-1000

Industry

Semiconductor Manufacturing

Latest update

May 1, 2024

Read about R&D Altanova

Frequent questions about Tarang Saxena

What company is Tarang Saxena working for?

Tarang Saxena works for R&D Altanova.

What is Tarang Saxena's function at R&D Altanova?

Tarang Saxena is Program Manager at R&D Altanova.

Where is Tarang Saxena based?

Tarang Saxena is based out of San Jose, California, United States.

What is Tarang Saxena's work email address?

Tarang Saxena's professional email address is t*****@rdalta***.com

Who are Tarang Saxena's co-workers?

Tarang Saxena's colleagues are Seyed Paransun, James Russell, Bassam Asfoor, Vassilis Danginis, Vassilios Danginis, JaeTaek Yoo, Leon Diatezua, Brenda Grados, Dan Turpuseema, Syed Yezdan, Yubing Wang, Jim Ferrell, Stratos Tripajis, Jizel Alvand, Uzair Arshad, Jaydutt Kulkarni, Danny Khano, Awais Aslam, Sneha Patel, Alex Avekians, Paul McLaughlin, Raza Ali, Nora Bader, Qizal Arsalan, Nishat Jawed, Sabhi Hashmi, Engr. Zulfiqar, Muhammad Misbah, Scott Green, Leonard Diatezua, Sheikh Tanveer, Evan Green, Viviana Aparicio, Monica Rivera-Younker.

Tarang's co-workers

Vice President Of Sales

Vassilis Danginis

Vice President Quality

Vassilios Danginis

Vice President Of Quality

JaeTaek Yoo

V.P., supply chain and procurement

Leon Diatezua

R&D Altanova Fine Pitch Fab Director

Brenda Grados

Lead Laboratory Technician

Dan Turpuseema

Director of Substrate Technology

Syed Yezdan

Director of Engineering

Yubing Wang

Director Of Process Engineering

Jim Ferrell

Director of Program Management

Stratos Tripajis

Lead Test Engineer of 3rd Shift Operations

Jizel Alvand

Customer Service Representative

Production Planner & Scheduler

Methods Engineering Manager

Nora Bader

Fabrication Specialist

Printed Circuit Board Design Engineer

Muhammad Misbah

PCB (ATE) Test Engineer

Scott Green

Buyer

Leonard Diatezua

Fine Pitch Substrates Operation Manager

Sheikh Tanveer

Substrate Design Engineer

Monica Rivera-Younker

Quality Assurance Supervisor

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