Michael Diep - Email & Phone Number

ASIC / FPGA Engineer at Firstpass Engineering

Michael Diep is based out of Mesa, Arizona, United States and works at Firstpass Engineering as ASIC / FPGA Engineer.

Michael Diep's Contact Information

Latest update

June 9, 2026

Location

Mesa, Arizona, United States

Michael's current employer

Firstpass Engineering

Description

Based in Colorado & Arizona, FirstPass provides all aspects of ASIC or FPGA development, including architecture definition, specification...

Website

firstpasseng.com

HQ Location

Castle Rock, CO, United States

Number of employees

51-200

Industry

Semiconductor Manufacturing

Latest update

April 30, 2024

Read about Firstpass Engineering

Frequent questions about Michael Diep

What company is Michael Diep working for?

Michael Diep works for Firstpass Engineering.

What is Michael Diep's function at Firstpass Engineering?

Michael Diep is ASIC / FPGA Engineer at Firstpass Engineering.

Where is Michael Diep based?

Michael Diep is based out of Mesa, Arizona, United States.

Who are Michael Diep's co-workers?

Michael Diep's colleagues are Ed Lord, John Sorebo, Kelsey Schneiderwind, Bruce Homer, Jeff Nicolas, Jody Martin, Jim Sweeten, Brad Kelley, Michael Parris, Chuck Seeley, Shahab Sharafi, Alan Geist, Mark Lijewski, David Dyer, David Olson, Kara Henson, Andrew Bailey, Marco Muñoz, Maria Mesyan, Scott Nixon, Greg Lannan, Melanie Graffy, Katie Chylinski, Umesh Mehta, Steve Sloan, Vince Gavagan, David Jenkins.

Michael's co-workers

Ed Lord

CEO

John Sorebo

Vice President of Business Development

Kelsey Schneiderwind

Sales and Marketing Coordinator

Bruce Homer

Vice President Of Engineering

Jeff Nicolas

Director Of Engineering

Senior Design Verification Engineer

Alan Geist

Principal Engineer

Mark Lijewski

Principal ASIC Engineer

David Dyer

Senior Principal Engineer

David Olson

Principal Engineer

Kara Henson

Senior Design Verification Engineer

Andrew Bailey

Asic/FPGA Design Engineer

Marco Muñoz

VLSI Validation Engineer

Maria Mesyan

Senior ASIC/FPGA Design and Verification Engineer

Scott Nixon

Principal ASIC/FPGA Engineer

Greg Lannan

Principle Engineer

Melanie Graffy

Member Of Technical Staff

Katie Chylinski

Digital Design & Verification Engineer

Umesh Mehta

Sr. Design Verification Engineer

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