Shahab Sharafi - Email & Phone Number

Senior Design Verification Engineer at Firstpass Engineering

Shahab Sharafi is based out of San Francisco Bay Area and works at Firstpass Engineering as Senior Design Verification Engineer.

Shahab Sharafi's Contact Information

Shahab Sharafi's Work email

s*****@firstp***.com

Valid

Latest update

October 13, 2025

Location

San Francisco Bay Area

Shahab's current employer

Firstpass Engineering

Description

Based in Colorado & Arizona, FirstPass provides all aspects of ASIC or FPGA development, including architecture definition, specification...

Website

firstpasseng.com

HQ Location

Castle Rock, CO, United States

Number of employees

51-200

Industry

Semiconductor Manufacturing

Latest update

April 30, 2024

Read about Firstpass Engineering

Frequent questions about Shahab Sharafi

What company is Shahab Sharafi working for?

Shahab Sharafi works for Firstpass Engineering.

What is Shahab Sharafi's function at Firstpass Engineering?

Shahab Sharafi is Senior Design Verification Engineer at Firstpass Engineering.

Where is Shahab Sharafi based?

Shahab Sharafi is based out of San Francisco Bay Area.

What is Shahab Sharafi's work email address?

Shahab Sharafi's professional email address is s*****@firstp***.com

Who are Shahab Sharafi's co-workers?

Shahab Sharafi's colleagues are Ed Lord, John Sorebo, Kelsey Schneiderwind, Bruce Homer, Jeff Nicolas, Jody Martin, Michael Diep, Jim Sweeten, Brad Kelley, Michael Parris, Chuck Seeley, Alan Geist, Mark Lijewski, David Dyer, David Olson, Kara Henson, Andrew Bailey, Marco Muñoz, Maria Mesyan, Scott Nixon, Greg Lannan, Melanie Graffy, Katie Chylinski, Umesh Mehta, Steve Sloan, Vince Gavagan, David Jenkins.

Shahab's co-workers

Ed Lord

CEO

John Sorebo

Vice President of Business Development

Kelsey Schneiderwind

Sales and Marketing Coordinator

Bruce Homer

Vice President Of Engineering

Jeff Nicolas

Director Of Engineering

Principal ASIC Engineer

David Dyer

Senior Principal Engineer

David Olson

Principal Engineer

Kara Henson

Senior Design Verification Engineer

Andrew Bailey

Asic/FPGA Design Engineer

Marco Muñoz

VLSI Validation Engineer

Maria Mesyan

Senior ASIC/FPGA Design and Verification Engineer

Scott Nixon

Principal ASIC/FPGA Engineer

Greg Lannan

Principle Engineer

Melanie Graffy

Member Of Technical Staff

Katie Chylinski

Digital Design & Verification Engineer

Umesh Mehta

Sr. Design Verification Engineer

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